MA300013【PDF 39/92 页】MODULE DSPIC30F SAMPLE 80QFP

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dsPIC30F

TABLE 10-4:

MATH INSTRUCTIONS

Assembly

ADD

ADD

ADD

ADD

ADDC

ADDC

ADDC

ADDC

DAW.B

DEC

DEC

DEC2

DEC2

DIV.S

DIV.SD

DIV.U

DIV.UD

DIVF

INC

INC

INC2

INC2

MUL

MUL.SS

MUL.SU

MUL.SU

MUL.US

MUL.UU

MUL.UU

SE

SUB

SUB

SUB

SUB

SUBB

SUBB

SUBB

SUBB

SUBBR

SUBBR

Syntax

f {,WREG}

#lit10,Wn

Wb,#lit5,Wd

Wb,Ws,Wd

f {,WREG}

#lit10,Wn

Wb,#lit5,Wd

Wb,Ws,Wd

Wn

f {,WREG}

Ws,Wd

f {,WREG}

Ws,Wd

Wm,Wn

Wm,Wn

Wm,Wn

Wm,Wn

Wm,Wn

f {,WREG}

Ws,Wd

f {,WREG}

Ws,Wd

f

Wb,Ws,Wnd

Wb,#lit5,Wnd

Wb,Ws,Wnd

Wb,Ws,Wnd

Wb,#lit5,Wnd

Wb,Ws,Wnd

Ws,Wnd

f {,WREG}

#lit10, Wn

Wb,#lit5,Wd

Wb,Ws,Wd

f {,WREG}

#lit10, Wn

Wb,#lit5,Wd

Wb,Ws,Wd

f {,WREG}

Wb,#lit5,Wd

Description

Destination = f + WREG

Wn = lit10 + Wn

Wd = Wb + lit5

Wd = Wb + Ws

Destination = f + WREG + (C)

Wn = lit10 + Wn + (C)

Wd = Wb + lit5 + (C)

Wd = Wb + Ws + (C)

Wn = decimal adjust Wn

Destination = f – 1

Wd = Ws – 1

Destination = f – 2

Wd = Ws – 2

Signed 16/16-bit integer divide *

Signed 32/16-bit integer divide *

Unsigned 16/16-bit integer divide *

Unsigned 32/16-bit integer divide *

Signed 16/16-bit fractional divide *

Destination = f + 1

Wd = Ws + 1

Destination = f + 2

Wd = Ws + 2

W3:W2 = f * WREG

{Wnd+1,Wnd} = sign(Wb) * sign(Ws)

{Wnd+1,Wnd} = sign(Wb) * unsign(lit5)

{Wnd+1,Wnd} = sign(Wb) * unsign(Ws)

{Wnd+1,Wnd} = unsign(Wb) * sign(Ws)

{Wnd+1,Wnd} = unsign(Wb) * unsign(lit5)

{Wnd+1,Wnd} = unsign(Wb) * unsign(Ws)

Wnd = sign-extended Ws

Destination = f – WREG

Wn = Wn – lit10

Wd = Wb – lit5

Wd = Wb – Ws

Destination = f – WREG – (C)

Wn = Wn – lit10 – (C)

Wd = Wb – lit5 – (C)

Wd = Wb – Ws – (C)

Destination = WREG – f – (C)

Wd = lit5 – Wb – (C)

Words

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

Cycles

1

1

1

1

1

1

1

1

1

1

1

1

1

18

18

18

18

18

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

SUBBR Wb,Ws,Wd

Wd = Ws – Wb – (C)

1 1

SUBR f {,WREG}

SUBR Wb,#lit5,Wd

SUBR Wb,Ws,Wd

ZE Ws,Wnd

Destination = WREG – f 1 1

Wd = lit5 – Wb 1 1

Wd = Ws – Wb 1 1

Wnd = zero-extended Ws 1 1

* Divide instructions are interruptible on a cycle-by-cycle basis. Also, divide instructions must be accompanied by a

REPEAT instruction, which adds 1 extra cycle.

? 2005 Microchip Technology Inc.

DS70043F-page 37

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